Lv11
60 积分 2024-05-07 加入
A RISC-V 32-bit microprocessor based on two-dimensional semiconductors
4小时前
已完结
Etching scallop-less nano-TSV with F/O coupling plasma
1年前
已完结
Completely Filling of Through-Silicon-Vias with High Aspect Ratio by High Cavity Physical Vapor Deposition and Electroplating
1年前
已完结
Enabling Low-k Liner in Ultra-high Aspect Ratio TSVs by the Timing of Vacuum Treatment in the Vacuum-assisted Spin-coating Technique
1年前
已完结
Development of Cu Seed Layers in Ultra-High Aspect Ratio Through-Silicon-Vias (TSVs) with Small Diameters
1年前
已完结
PPA and Scaling Potential of Backside Power Options in N2 and A14 Nanosheet Technology
1年前
已完结
Block-level Evaluation and Optimization of Backside PDN for High-Performance Computing at the A14 node
1年前
已完结
Nano-Through Silicon Vias (nTSV) for Backside Power Delivery Networks (BSPDN)
1年前
已完结
Electromigration of Backside Power Delivery Networks for PPA-Reliability Tradeoffs at N2 Node
1年前
已完结
Breakthrough Design Technology Co-optimization using BSPDN and Standard Cell Variants for Maximizing Block-level PPA
1年前
已完结
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