Lv31
346 积分 2020-12-14 加入
A 2 $\times$ 24 Gb/s Single-Ended Transceiver With Channel-Independent Encoder-Based Crosstalk Cancellation in 28-nm CMOS
2小时前
已完结
A 56-Gb/s PAM-4 VCSEL Transmitter With Piecewise Compensation Scheme in 40-nm CMOS
2小时前
已完结
A 128-Gb/s PAM-4 Transmitter With Edge-Boosting Pulse Generator and Pre-Emphasis Asymmetric Fractional-Spaced FFE in 28-Nm CMOS
2小时前
已完结
A 0.32-pJ/b 100-Gb/s PAM-4 TIA in 28-nm CMOS
3天前
已完结
50Gb/s high-speed serial interface receiver CTLE equalization circuit design
3天前
已完结
A 2 × 80 Gb/s Single-Ended TAS-TIS PAM-4 Receiver Front-End With Crosstalk Cancellation and Signal Reutilization in 28-nm CMOS
3天前
已完结
An automatically generated VHDL-code of a Delta-Sigma-Modulator
1个月前
已完结
A 1.4-Vppd 64-Gb/s PAM-4 Transmitter with 4-Tap Hybrid FFE Employing Fractionally-Spaced Pre-Emphasis and Baud-Spaced De-Emphasis in 28-nm CMOS
1个月前
已完结
A Real-Time Output 50-GS/s 8-bit TI-ADC with Dedicated Calibration Techniques and Deterministic Latency
1个月前
已完结
Frequency Domain Modeling and Performance Analysis of Injection-Locked LC Oscillator
1个月前
已完结
皖公网安备34019202002308
