Lv6
2200 积分 2022-06-22 加入
Analog designer
A Low-Phase-Noise Wide-Tuning-Range Mode-Switching Oscillator Using Multi-Magnetic-Coupling and Active-Source-Degenerating Techniques
18小时前
已完结
Miller’s Wrong Half-Plane Zero [Shop Talk: What you didn’t Learn in School]
1个月前
已完结
How To Design a Differential CMOS LC Oscillator
2个月前
已完结
Flicker Phase-Noise Reduction Using Gate–Drain Phase Shift in Transformer-Based Oscillators
2个月前
已完结
A 3.6-GHz Type-II Sampling PLL With a Differential Parallel-Series Double-Edge S-PD Scoring 43.1-fsRMSJitter, −258.7-dB FOM, and −75.17-dBc Reference Spur
3个月前
已完结
A 4-GHz Ring-Oscillator-Based Digital Sub-Sampling PLL With Energy-Efficient Dual-Domain Phase Detector
3个月前
已完结
A 1.4psrms-period-jitter TDC-less fractional-N digital PLL with digitally controlled ring oscillator in 65nm CMOS
3个月前
已关闭
A 28-Gb/s Single-Ended PAM-4 Receiver With T-Coil-Integrated Continuous-Time Linear Equalizer in 40-nm CMOS Technology
6个月前
已完结
Design Techniques for High-Speed Wireline Transmitters
6个月前
已完结
Design and Optimization of T-Coil-Enhanced ESD Circuit with Upsampling Convolutional Neural Network
6个月前
已完结
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