Lv1
20 积分 2024-09-18 加入
Clock tree synthesis in modern VLSI: From foundational algorithms to AI-driven optimization
5小时前
待确认
An analytical timing-driven placer for modern heterogeneous FPGAs
1个月前
已完结
A Mini-Review of Methods for Forecasting Post Routing Congestion from Placement in FPGA Physical Design
3个月前
已完结
LSC
6个月前
已完结
A Nonlinear Analytical Optimization Method for Standard Cell Placement of VLSI Circuits
9个月前
已完结
Dual Multimodal Fusions With Convolution and Transformer Layers for VLSI Congestion Prediction
9个月前
已完结