The Gate Cut Process Window Discussion

The technology of FinFET has led to the continuity of device scaling and enabled the prolongation of Moore’s Law towards the 7 nm and beyond nodes. The gate cut last has been widely adopted since it can provide better SiP/SiGe growth environment, hence yielding the better electrical performance. However, This approach requires a higher level of defect control. As we all know, the first task of gate cut is to completely cut off the gate, so that the metal gate that do not need to be connected can realize electrical separation. If good electrical insulation can not be achieved, there will induce a large leakage, so that the working voltage is increased. However, due to the miniaturization of the size, the distance between the end of the metal gate and the effective Fin is very short, which requires that the gate cutting can not only achieve electrical isolation through the size increase. The filling and patterning of the various materials of the metal gate must be considered. On the other hand, defect control is also critical for many special structures, such as gate ends formed by SaDP and gate cutting with special relationship to Fin. This paper focuses on defect issues related to gate cutting in FinFET. It mainly includes: the first, some common defects related to gate cutting itself, such as the absence of cutting pattern caused by etch bias in dense and iso areas, the mutation of gate cutting pattern caused by stress introduction, and the gate bridge caused by tapered bottom profile, etc. The second, defect issues caused by gate cutting size affecting other manufacturing processes, such as residue generated by HKMG pattering, dummy poly gate residue, capping layer residue, single diffusion break induce metal gate bridge, etc. The third, defect issue of a structure that has a special relationship to the gate cut pattern, gate line end bridge, etc. In this article, we will discuss these typical defect issues in detail to gain a better understanding of the gate cut process. By understanding these defects, we can better control the metal gate cut process and maximize the process window.