High-Performance Thin-Film Transistors and Inverters Based on ALD-Derived Ultrathin Al₂O₃-Passivated CeO₂ Bilayer Gate Dielectrics

In this article, solution-derived amorphous cerium oxide (CeO ₂ ) with smooth surface as gate dielectric has been investigated. Electrical analysis has indicated that ALD-derived 3 nm Al ₂ O ₃ passivation layer on CeO ₂ surface is benefit to reduce leakage current of CeO ₂ MOS capacitors. Meanwhile, solution-processed In ₂ O ₃ thin-film transistors (TFTs) based on optimized Al ₂ O ₃ /CeO ₂ bilayer dielectric are integrated for the first time. Results indicate that 300 °C annealed In ₂ O ₃ /Al ₂ O ₃ /CeO ₂ TFT presents high performances with saturation mobility of 18.25 ± 0.92 cm ² / $\text{V}\cdot \text{s}$ , ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ ratio of (1.81 ± 0.30) $\times \,\,10^{{7}}$ , subthreshold swing of 0.071 ± 0.002 V/decade, interfacial trap states ( ${D}_{\,\text {it}}$ ) of (6.00 ± 0.48) $\times \,\,10^{{11}}$ cm $^{-{2}}$ , and remarkable positive bias stress (PBS) stability, respectively. Furthermore, a resistor-loaded inverter is fabricated with voltage gain of 12.81 at 5 V and good voltage-transfer characteristics (VTCs), demonstrating the potential application of Al ₂ O ₃ /CeO ₂ as high- ${k}$ gate stacks for future TFTs.