电迁移
铜互连
材料科学
石墨烯
电介质
低介电常数
薄脆饼
成核
铜
制作
光电子学
互连
生产线后端
纳米技术
复合材料
冶金
化学
计算机科学
替代医学
医学
有机化学
病理
计算机网络
作者
T. Nogami,S. Nguyen,Huai Huang,Nicholas A. Lanzillo,H. Shobha,J. Li,B. Peethela,A. Parbatani,B. van Schravendijk,B. Varadarajan,I. Narkeviciute,E. Srinivasan,K.K. Sharma,R. Knarr,S. Schmitz,V. Ramanan,D. Edelstein
标识
DOI:10.1109/iedm19574.2021.9720525
摘要
A selective graphene (Gr) CVD process for 300 mm wafers at BEOL compatible temperatures (<400°C) for application as a cap on copper interconnects and a dielectric deposition on top of the Gr cap without impacting Gr quality by functionalizing the Gr surface to promote nucleation of the dielectric film. The integrated Gr and dielectric deposition pro-cesses enabled fabrication of integrated dual damascene Cu/low-k interconnects in the metal pitch of 30 nm. Observed poor electromigration (EM) reliability of Gr capped Cu inter-connects with 16 nm metal width was in good agreement with our Ab Initio calculation of binding energy of Gr to Cu. In-stead, Cu interconnects with Gr cap on selective Co cap showed decent EM reliability with reduction of line resistance up to 5 %, providing a promising solution for Cu extension.
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