Two‐Dimensional Semiconductor–Metal Contact Engineering: Challenges and Strategies for High‐Performance Electronics

ABSTRACT The emerging 2D semiconductors are promising candidates for beyond‐silicon electronics because of their atomic‐scale thickness, high carrier mobility at the 2D limit, and so on. Achieving semiconductor–metal (S–M) ohmic contact with low resistance is crucial for high‐performance electronics devices. However, the inherent van der Waals (vdW) gap, pronounced Fermi‐level pinning, and quantum tunneling barriers at 2D S–M interfaces result in Schottky barrier and high contact resistance, which remains a bottleneck for 2D electronics. Great efforts have been devoted to solve the 2D S–M contact issues. This review aims to report the latest progress in addressing the challenges of 2D S–M contact. Different strategies for reducing 2D S–M contact resistance, including doping of 2D semiconductors, screening of optimal electrode materials, edge contact, and interface intercalation and functionalization, are discussed with detailed comparison on their advantages and disadvantages. The review is concluded with the standing challenges and outlook on future research directions for achieving low‐resistance 2D S–M ohmic contact.