Retention and endurance analysis for 2T0C DRAM based on ALD-ITZO thin film transistors

德拉姆 材料科学 光电子学 晶体管 薄膜晶体管 节点(物理) 电容器 泄漏(经济) 动态随机存取存储器 纳米技术 电气工程 电子工程 计算机科学 电压 计算机硬件 图层(电子) 工程类 半导体存储器 经济 宏观经济学 结构工程
作者
Jingxuan Wei,Yu Zhang,Nannan Li,Bojia Chen,Rongxu Bai,Xuefeng Wu,Wenrui Zhang,Ji Li,Qingqing Sun,David Wei Zhang,Shen Hu
出处
期刊:Nanotechnology [IOP Publishing]
被引量:1
标识
DOI:10.1088/1361-6528/ade80f
摘要

Abstract DRAM technology is crucial in modern integrated circuits. However, the conventional 1T1C DRAM is approaching its limitations in scalability near 10 nm technical node, posing challenges for storage capacity and integration. Therefore, research has focused on incorporating 3D-stacking DRAM to enhance both capacity and integration. Among these advancements, the capacitor-less-two-transistor (2T0C) was demonstrated as a novel architecture to facilitate the development of 3D DRAM for integration enhancement. Numerous studies have employed metal oxide semiconductors (MOS) as the channel material for 2T0C DRAM. As a novel MOS, indium tin zinc oxide (ITZO) has demonstrated exceptional performance in thin-film transistors (TFTs) with high mobility and on-current, surpassing widely used MOS of IGZO in 2T0C DRAM. In this study, ITZO TFTs and 2T0C DRAM devices were fabricated via ALD for comprehensive film and device characterization. The single ITZO TFTs exhibited the Ion/Ioff ratio of 106 and the leakage current of 10-5 μA/μm. The 2T0C DRAM devices were utilized to characterize the retention, endurance and operation window for device evaluation and in comparison with 1T1C DRAM. The results revealed that various sizes of 2T0C DRAM devices demonstrated retention time ranging from 10 to 100 seconds, an endurance of 105 program-erase cycles, and an operation voltage window of 5.05 V. Notably, the transfer characterizations of the fabricated ITZO TFT exhibited a distinct “0” read state, different from the fresh state, which supports a novel reclassification of the operational states of 2T0C DRAM.
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