Nonvolatile ferroelectric memory based on hafnium oxide thin films combines low power consumption, high speed, and record endurance. However, the commercialization of such memory is constrained due to the limited information retention time caused by the change in coercive voltage over time. Many efforts are under way to slow down this effect by material and interface engineering, and their results are being evaluated by comparison of the switchable polarization and coercive voltages at the time of writing information and reading it after a certain storage time. However, the real-life scenarios of a memory cell are much-more complex than a simple write-store-read cycle. Coercive voltages evolve over the whole lifetime of the memory cell, and read failure can occur in subsequent stages. In this work, we propose a predictive model for calculating the evolution of coercive voltages under any scenario of memory-cell lifetime. In particular, it takes into account multiple write-store-read-rewrite (both to the same state and to the opposite state) cycles, temperature fluctuations to which the memory chip is inevitably subjected, the influence of the selected operating frequency, and the procedure for recovery of the memory cell after its aging by a series of bipolar pulses, which is considered by memory designers as one of the options for increasing the retention time. The model is based on the polarization-switching dynamics described by the Landau-Khalatnikov equation and the phenomenon of charge injection into interfacial traps under the action of both the applied field and the spontaneous polarization field. The injected charge induces an internal built-in electric field in the ferroelectric layer, and leads to a change in the total field and an apparent change in the coercive voltage. The calculation results are in agreement with the results of experiments simulating different real-life scenarios of a memory cell based on a 10-nm-thick Hf0.5Zr0.5O2 film. The proposed model could serve as an intelligent tool for both material engineering and memory-chip design, which entails a new step in the development of ferroelectric memory. locked icon locked icon locked icon locked icon locked icon locked icon locked icon locked icon locked icon locked icon locked icon locked icon locked icon locked icon locked icon Physics Subject Headings (PhySH)DefectsElectric polarizationFerroelectricityThermionic emissionTransport phenomenaDevices for digital logic, storage & processingSolid-solid interfacesThin films