80 nm tall thermally stable cost effective FinFETs for advanced dynamic random access memory periphery devices for artificial intelligence/machine learning and automotive applications

Abstract Automotive, Artificial Intelligence/Machine Learning and blockchain generation are imposing increasing demanding specs for Dynamic Random Access Memory (DRAM) memories. Wider memory bandwidth can be achieved by using conventional planar SiO 2 MOSFET and different interfaces but at the expense of required energy per bit. Advantages of High-K/Metal Gate versus SiO 2 /SiON planar DRAM periphery devices compatible with DRAM memory fabrication have been demonstrated in literature. More recently, the power performance benefit of FinFET for DRAM peri devices have been discussed. In this paper we provide a detailed analysis and additional insights in the first experimental validation of a thermally stable, reliable and cost effective tall fins platform (65 and 80 nm fin height). Power performance benefit versus fin height and expected area advantages on Sense Amp area are presented.