符号
与非门
算法
数学
离散数学
计算机科学
算术
逻辑门
作者
Sungho Park,Ho-Nam Yoo,Yeongheon Yang,Jae‐Joon Kim,Jong‐Ho Lee
标识
DOI:10.1109/ted.2024.3350000
摘要
In order to improve the reliability of vertical NAND (V-NAND) flash memory cells, a scheme using adaptive incremental step pulse programming (A-ISPP) and incremental step pulse erasing (ISPE) is proposed. Incremental step pulse programming (ISPP) with adaptive step voltage is used to precisely adjust ${V}_{\text {th}}$ to a low target value while rapidly increasing ${V}_{\text {th}}$ to a high target value. By applying ISPE after A-ISPP, an accurate ${V}_{\text {th}}$ with improved retention characteristics is obtained at a high target ${V}_{\text {th}}$ level. Compared to the conventional ISPP, the proposed scheme improves adjusted ${V}_{\text {th}}$ accuracy and ${V}_{\text {th}}$ dispersion by 60% using the same step voltage and a similar number of pulses. With the proposed scheme, the retention characteristics are also improved by ~43%, and the distribution of $\Delta {V}_{\text {th}}$ is narrowed by ~38%.
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