晶体管
钥匙(锁)
互连
数据中心
计算机科学
中间层
电气工程
逻辑门
功率(物理)
计算机体系结构
工程类
电信
操作系统
材料科学
蚀刻(微加工)
物理
图层(电子)
量子力学
电压
复合材料
标识
DOI:10.1109/vlsi-tsa/vlsi-dat57221.2023.10134000
摘要
The advent of 2.5D packaging integration technology in the last decade realized a performance breakthrough. This new class of packaging technology boosts the computing power greatly and develops into a standard in today's fastest HPC and AI systems. A general performance index to gauge the performance is the total number of transistors within a package. Typically a few tens billion of logic transistors and memory transistors ~10x of logic. In this talk, I will list the key attributes that are required to increase the performance further at a higher power efficiency. These include larger interposer area, more global and semi-global interconnect layers, passives, and thermal solutions. The opportunities and challenges to develop such a system will also be addressed.
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