Interfaces and Junctions in Nanoscale ZnO and InAs Transistor Structures

In this thesis, a multi-scale simulation study of Ni/InAs nano-scale contact aimed for the sub-14 nm technology is carried out to understand material and transport properties at a metal-semiconductor interface.The deposited Ni metal contact on an 11 nm thick InAs channel forms an 8.5 nm thick InAs leaving a 2.5 nm thick InAs channel on a p-type doped (1×10 16 cm -3 ) AlAs 0.47 Sb 0.53 buffer.The density functional theory (DFT) calculations reveal a band gap narrowing in the InAs at the metal-semiconductor interface.The one-dimensional (1D) self-consistent Poisson-Schrödinger transport simulations using real-space material parameters extracted from the DFT calculations at the metal-semiconductor interface, exhibiting band gap narrowing, give a specific sheet resistance of R sh = 90.9Ω/sq which is in a good agreement with an experimental value of 97 Ω/sq.In this thesis, ZnO thin-film transistors (TFTs) with different channel lengths (10 µm, 5 µm, 4 µm, and 2 µm) have been characterised.The current-voltage measurements indicate n-type channel, enhancement mode TFT operation with an excellent drain current saturation.A transmission line method (TLM) is employed to extract the contact resistance, effective and channel electron mobility from current-voltage characteristics in the linear regime of transistor operation.Contact resistance and both effective and channel electron mobility exhibit a dependency on the channel length as a function of gate bias (10 V and 15 V).The extracted channel electron mobility is high as 0.782 cm 2 /Vs and 0.83 cm 2 /Vs (increase by 6 %) at gate biases of 10 V and 15 V, respectively, for the 10 µm channel length as compared to effective mobility of 0.11 cm 2 /Vs and 0.38 cm 2 /Vs, at the same respective biases.