Performance enhancement of charge plasma-based junctionless TFET (JL-TFET) using stimulated n-pocket and heterogeneous gate dielectric

Abstract Junctionless tunneling field-effect transistor (JL-TFET) is an excellent potential alternative to conventional MOSFET and TFET due to the lack of a steep doping profile, which makes it easier to fabricate. JL-TFET not only offers a lower subthreshold swing (SS) compared to MOSFET, but mitigates the low on-current problem associated with conventional TFET. The DC and analog characteristics of JL-TFET can be further improved by design modifications. In this research, we have presented two novel structures of JL-TFET: stimulated n-pocket JL-TFET (SNPJL-TFET) and SNPJL-TFET with heterogeneous gate dielectric. The performance of these devices has been gauged against conventional JL-TFET. Both novel structures exhibit excellent performance including point SS around 20 mV/dec, high I ON / I OFF in the order of 10 14 and lower threshold voltage ( V T ). By analyzing RF and linearity parameters such as the transconductance generation factor, F T , transit time, total factor productivity, second-order voltage intercept point, third-order voltage intercept point, third-order input intercept point and third-order intermodulation distortion, it is observed that the proposed devices are more suitable for RF applications since they show superiority in most of the analyzed parameters.