电阻器
最低有效位
12位
无杂散动态范围
8位
电阻式触摸屏
电压
电子工程
计算机科学
数模转换器
电气工程
位(键)
微分非线性
分压器
CMOS芯片
工程类
计算机安全
操作系统
作者
Jywe-Fei Fang,Xianjing Zou,Shuyan Luo,Ning Shang,Yizhou Huang,Meilin Wan
标识
DOI:10.1109/iccs59502.2023.10367248
摘要
A 12-bit voltage digital-to-analog converter (DAC) based on a dual 8-bit resistive divider DACs is proposed. The resistor ladder structure is used to achieve two 8-bit DACs. Then, analog addition, subtraction, multiplication, and division operations are performed on the outputs of the two 8-bit DACs, achieving a final 12-bit DAC output voltage. The circuit structure is simple, it only uses a total of 512 resistors, avoiding the problem of requiring a larger area and being susceptible to process mismatch as in traditional structures that use 4096 resistors. The proposed 12-bit voltage DAC is designed using HHGRACE 110nm process, and the entire area is $0.144\ \text{mm}^{2}$ . The post-simulation results show that, under typical process and temperature conditions, the simulated DNL is −0.17~0.13 LSB, INL is −0.06~0.23 LSB, SFDR is 87.7734 dB, and ENOB is 11.8604 bits.
科研通智能强力驱动
Strongly Powered by AbleSci AI