纳米片
材料科学
逆变器
噪声裕度
光电子学
纳米技术
电压
晶体管
电气工程
工程类
作者
Junichi Hattori,Koichi Fukuda,Tsutomu Ikegami,Wen-Hsin Chang
标识
DOI:10.35848/1347-4065/acae61
摘要
Abstract We simulate the static behavior of Ge-p/Si-n nanosheet complementary FETs (CFETs), where p-type FETs containing Ge nanosheet channels are stacked on top of n-type FETs containing Si nanosheet channels, and we investigate its relation to temperature while comparing it with that of Si-p/Si-n nanosheet CFETs, whose p-type FETs contain Si nanosheet channels. It is found that temperature rise has similar effects on the static characteristics of the two CFETs operating as inverters, although the variations in threshold voltage and noise margin with rising temperature are slightly smaller in the Ge-p/Si-n CFET inverter than in the Si-p/Si-n CFET inverter. The temperature rise effects are fully explained by the temperature dependence of material and carrier properties of Ge and Si.
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