Design optimisation of self‐powered gate driver for ultra‐fast DC solid‐state circuit breakers using SiC JFETs

IET Power ElectronicsVolume 10, Issue 15 p. 2149-2156 Special Issue: Flexible Operation and Control for Medium Voltage Direct-Current (MVDC) GridFree Access Design optimisation of self-powered gate driver for ultra-fast DC solid-state circuit breakers using SiC JFETs Dong He, College of Electrical and Information Engineering, Hunan University, Changsha, 410082 People's Republic of ChinaSearch for more papers by this authorZhijie Xiong, College of Electrical and Information Engineering, Hunan University, Changsha, 410082 People's Republic of ChinaSearch for more papers by this authorZhiqi Lei, College of Electrical and Information Engineering, Hunan University, Changsha, 410082 People's Republic of ChinaSearch for more papers by this authorZhikang Shuai, Corresponding Author shuaizhikang-001@163.com College of Electrical and Information Engineering, Hunan University, Changsha, 410082 People's Republic of ChinaSearch for more papers by this authorZheng John Shen, Department of Electrical and Computer Engineering, Illinios Institute of Technology, Chicago, IL, 60616 USASearch for more papers by this authorJun Wang, College of Electrical and Information Engineering, Hunan University, Changsha, 410082 People's Republic of ChinaSearch for more papers by this author Dong He, College of Electrical and Information Engineering, Hunan University, Changsha, 410082 People's Republic of ChinaSearch for more papers by this authorZhijie Xiong, College of Electrical and Information Engineering, Hunan University, Changsha, 410082 People's Republic of ChinaSearch for more papers by this authorZhiqi Lei, College of Electrical and Information Engineering, Hunan University, Changsha, 410082 People's Republic of ChinaSearch for more papers by this authorZhikang Shuai, Corresponding Author shuaizhikang-001@163.com College of Electrical and Information Engineering, Hunan University, Changsha, 410082 People's Republic of ChinaSearch for more papers by this authorZheng John Shen, Department of Electrical and Computer Engineering, Illinios Institute of Technology, Chicago, IL, 60616 USASearch for more papers by this authorJun Wang, College of Electrical and Information Engineering, Hunan University, Changsha, 410082 People's Republic of ChinaSearch for more papers by this author First published: 04 October 2017 https://doi.org/10.1049/iet-pel.2017.0283Citations: 7AboutSectionsPDF ToolsRequest permissionExport citationAdd to favoritesTrack citation ShareShare Give accessShare full text accessShare full-text accessPlease review our Terms and Conditions of Use and check box below to share full-text version of article.I have read and accept the Wiley Online Library Terms and Conditions of UseShareable LinkUse the link below to share a full-text version of this article with your friends and colleagues. Learn more.Copy URL Share a linkShare onEmailFacebookTwitterLinked InRedditWechat Abstract Solid-state circuit breakers (SSCBs) inherently have excellent protection performance, thus they are popular for DC distribution protection. However, the safety and reliability of the SSCBs are limited by the rapid response ability of their own gate drivers. In this study, a self-powered SSCB with a normally-on silicon carbide (SiC) junction gate field-effect transistor (JFET) is proposed as the solid-state switch, whose gate drivers are optimised as well. First, both an optimised fault detection circuit and a designed forward–flyback DC/DC converter of the SSCB gate driver have been presented to achieve fast protection during the course of fault isolation. Then, the detailed analyses of the gate driver circuit parameters effect on protection speed are further investigated based on circuit theory and MATLAB calculation. In order to compare and analyse the dynamic responses of the SSCB with and without optimisation, the actual interruption tests of the fabricated SiC JFET circuit breaker prototype and the employed prototype 400 V DC distribution system have been carried out. The results show that the implementation approach is able to improve protection speed for the SSCBs within the order of a few microseconds. 1 Introduction With the development of modern power electronics and smart grid technologies, high power supply efficiency and quality are expected [1-3]. Compared with AC systems, DC distribution networks can effectively improve the power quality, reduce energy conversion steps, decrease power loss and running costs, as well as maximise the value and benefits of distributed energy resources [4]. Currently, DC systems have already been applied as one of the effective energy technologies for data centres, shipboard power systems, metro traction systems [5, 6] and so on. In general, the reliable fast DC circuit breaker is always one of the important prerequisite for extensive adopting DC power [7-9]. Due to rapid increasing DC fault currents caused by low short-circuit impedance in DC systems, fast protection is necessary to prevent damages to power electronic equipments [10]. Conventional moulded case circuit breakers (MCCBs) have a relatively slow action speed, and it is prone to arc damage for DC power system. Therefore, fast DC protection is challenging to realise with conventional circuit breakers. Fortunately, solid-state circuit breaker (SSCB)-based DC protection does not suffer from the above problem and can achieve full protection of DC systems by the rapid protection speeds (ranging from several microseconds to <1 ms) of SSCBs together with the appropriate coordination between upstream and downstream SSCBs. For SSCBs, insulated-gate bipolar transistors and integrated gate-commutated thyristors are usually applied as main static switches [11-15] because of their wide commercial applications, high rated current and low power demands to operate gate drivers. However, the semiconductor devices of SSCBs have an on-state resistance and thus increased losses than conventional MCCBs. One disadvantage of the studied SSCBs is that SSCBs should depend on complex auxiliary system, e.g. one or more auxiliary power supply, costly fault measuring unit, digital controller and communication system. Recently, wide-bandgap semiconductor technologies such as silicon carbide (SiC) power devices have emerged as solid-state switches for SSCBs [16-20]. These SiC-based SSCBs are featured with low on-resistance, large safe operating area and extreme fast protection speed. With SiC static induction transistors (SITs), the overvoltage of the SiC SITs DC circuit breaker at DC fault interruption can be controlled without extra suppressing circuits [16]. Considering an auxiliary power source for the gate drivers of the SiC SITs is required in [16], a 600 V–60 A bidirectional SiC junction gate field-effect transistors (JFETs)-based SSCB was further investigated in [17]. A novel gate driver was designed for both self-triggered temperature-compensated over-current protection and external triggering. Even though the short-circuit faults are isolated in a very short time (∼10 μs), the gate drivers of the SiC JFETs still need an auxiliary DC power source for the steady-state operation. A gate driver for the safe operation of normally-on SiC JFETs has also been proposed in [18]. This driver is able to handle the short-circuit current within a few microseconds, but the auxiliary power source limits its application. In the previous works of the authors, a new self-powered SSCB design concept with an even faster response time and without requiring any external auxiliary power source has been presented in [19, 20]. The main static switch SiC JFET of this SSCB is a normally-on device, and the response speed (the time it takes to isolate fault from fault detection to drive JFET turn-off) of the SSCB may cause a fault current to damage the JFET and other power electronic devices in the circuit when a short-circuit event occurs. Since this response time is mainly determined by the switch time of SSCB gate driver from idle state to operating mode, this mode switching process the faster the better. Furthermore, the gate driver needs to provide a stable negative gate–source voltage to the JFET in order to make it turn off reliably during the SSCB operation process. Therefore, a fast and reliable gate driver is the most significant design goal of this study to realise an SSCB operating time within the order of a few microseconds. In this paper, the further investigation of the optimisation design of self-powered gate driver for the SiC JFET-based SSCB is carried out. The rest parts of the paper are as follows. In Section 2, the operational principle of self-powered SiC-based SSCB is introduced. A well-design fault detection circuit is used and optimised to make it react to a short-circuit fault fast, and the detailed analyses of the voltage detecting circuit parameters effect on protection speeds are presented. A forward–flyback DC/DC converter is utilised to turn off the JFET by generating a negative gate–source voltage. The optimal design considerations of this converter topology are discussed. In Section 3, the applicability and effectiveness of the proposed optimal design method is validated by an experimental prototype 400 V DC distribution network and the fabricated SiC-based SSCB prototype. Finally, Section 4 concludes this paper. 2 Optimising design of the self-powered gate driver for SSCB In general, fast the SSCB response to a short-circuit fault always means short switch time to activate the gate driver from the idle state. Accordingly, the optimal design of the gate driver topologies and parameters is very important to the rapidity of the SSCB. To provide a fast response speed within a few microseconds for gate driver circuit of the SSCB, the impacts of the fault detecting circuit and the DC/DC converter parameters on the protection speeds are analysed by the circuit theory and MATLAB calculation in advance. Then, the optimal design considerations of the gate driver parameters are discussed. 2.1 Structure and principle of the SiC-based SSCB Fig. 1 shows a detailed schematic diagram of the SSCB [20] where all the key components are presented. It mainly consisted of a normally-on 1200 V SiC JFET as the solid-state switch and a fast-acting gate driver. When the DC system runs normally, the solid-state switch JFET operates in an on-state; when a short-circuit occurs, the gate driver detects the fault signal and drives the JFET to turn off to realise the fault isolation. The gate driver circuit contains a fault detecting circuit and a DC/DC converter. Fig. 1Open in figure viewerPowerPoint Detailed schematic diagram of the SSCB using SiC JFET The voltage sensor circuit is made of a RC network and is formed by R1, R2, C1, C2, and a clamping diode D1. This circuit can sense the drain–source voltage of the JFET when a current (a normal load current or a short-circuit fault current) flows through the SSCB, thereby converting this voltage into the operating voltage of the SSCB gate driver and its value determines the turn off rate of the circuit. After the short-circuit fault occurs, the fault detection circuit detects the drain–source voltage of the JFET, and this process should be fast enough to provide a power to the SSCB gate driver and drive the JFET rapid and reliable shut off without an auxiliary power supply. Thus, the response time of the fault detecting circuit affects the start-up process of the gate driver directly. However, the solid-state switch SiC JFET is a normally-on device, which requires a stable negative gate–source voltage of −20 to −5 V to drive it turn off completely. The main function of the DC/DC converter in the SSCB gate driver is to isolate the JFET gate signal from the main circuit and to require fast start-up once the drain–source voltage of the JFET exceeds the threshold voltage (e.g. 6 V) of the pulse-width modulation (PWM) signal generator under a short-circuit fault. In addition, a stable −15 V bias voltage is provided to the JFET by the DC/DC converter to ensure that the fault can be isolated by the SSCB reliably in a few microseconds. Here, the PWM signal generator drives metal–oxide–semiconductor field-effect transistor (MOSFET) of the converter with a fixed frequency. The DC/DC converter can be designed as a flyback topology, but a forward–flyback topology is used in order to provide a faster response speed in this paper. The detailed design discussion will be described in Section 2.3. In a word, whether the DC/DC converter can offer a stable negative bias voltage to support the JFET turn off in a few microseconds will directly affect the protection speed of the SSCB. According to the above analysis, this SSCB achieves the fault isolation from detecting fault signal to driving JFET turn off when a short-circuit fault occurs, and hence, its protective action depends heavily on the response time of the fault detecting circuit and the DC/DC converter in the gate driver. However, the start-up times are closely related to the parameters of the gate driver circuit, which determines the rapidity of the circuit breaker protection action. The response time of the gate driver for the SSCBs can be improved by optimising the circuit parameters and topologies of the fault detecting circuit and the DC/DC converter. Therefore, the intrinsic relationship between the gate driver parameters and the response times will be discussed carefully in Sections 2.2 and 2.3, which is useful to achieve the optimal design of the SSCBs. 2.2 Analysis and parameter design of the voltage detecting circuit Instead of detecting the current that the SSCB detects a short circuit, the voltage across its terminals is detected when a short-circuit fault occurs. The gate driver circuit of the SSCB will be activated when the drain–source voltage of the JFET exceeds the threshold of the PWM signal generator. Fig. 2 shows the topology of voltage detecting circuit. To describe the influence of voltage detecting circuit parameters on protection speed, the energy transfer process of this circuit is analysed in detail. This process is divided into three stages: 1) Stage I: In this stage, the drain-source voltage of the JFET is chargingC1, C2first. Since the capacitor has a dynamic characteristic of throughdirect current and block alternating current, whenC1, C2are not fully charged, this circuit is in a short-circuit state.Fig. 3ashows the energy transfer process in this phase. According to theKirchhoff's voltage law (KVL), the input voltageVin can be written as (1) Fig. 2Open in figure viewerPowerPoint Topology of voltage detecting circuit Fig. 3Open in figure viewerPowerPoint Various energy transfer process of the voltage detecting circuit of SSCB (a) Stage I, (b) Stage II, (c) Stage III Assuming , the current i2 is given by (2) By (1) and (2), the voltage VC′ can be derived from a one-order differential equation (3) Solving the differential equation (3) yields the VC′ as (4) Since the initial voltage of capacitors C1 and C2 in detecting circuit are, respectively, zero, VC′(0) = 0, then Vin can be expressed as (5) According to (4), the voltage VC′ is given by (6) Substituting (6) to (2), the relation between the input voltage Vin and the current i2 can be expressed as (7) As shown in Fig. 1, the capacitor C2 voltage provides a power supply for the driver circuit. In order to reduce the SSCB response time, C2 must be fully charged first when charging capacitors C1 and C2. That is, the value of capacitor C2 should be much smaller than C1. In the stage I, the voltage VC2 can be defined by the following expression based on (6) and (7): (8) According to (8), the charging time of C2 is given by (9) 2) Stage II: Since C2 <