记忆电阻器
计算机科学
跟踪(心理语言学)
深度学习
人工智能
神经形态工程学
人工神经网络
专用集成电路
无监督学习
学习规律
机器学习
计算机体系结构
嵌入式系统
电子工程
工程类
哲学
语言学
作者
D Wang,Jiawei Xu,Feng Li,Lianhao Zhang,Chengwei Cao,Dimitrios Stathis,Anders Lansner,Ahmed Hemani,Lirong Zheng,Zhuo Zou
出处
期刊:IEEE Transactions on Biomedical Circuits and Systems
[Institute of Electrical and Electronics Engineers]
日期:2023-10-01
卷期号:17 (5): 1153-1165
被引量:1
标识
DOI:10.1109/tbcas.2023.3291021
摘要
The memristor has been extensively used to facilitate the synaptic online learning of brain-inspired spiking neural networks (SNNs). However, the current memristor-based work can not support the widely used yet sophisticated trace-based learning rules, including the trace-based Spike-Timing-Dependent Plasticity (STDP) and the Bayesian Confidence Propagation Neural Network (BCPNN) learning rules. This paper proposes a learning engine to implement trace-based online learning, consisting of memristor-based blocks and analog computing blocks. The memristor is used to mimic the synaptic trace dynamics by exploiting the nonlinear physical property of the device. The analog computing blocks are used for the addition, multiplication, logarithmic and integral operations. By organizing these building blocks, a reconfigurable learning engine is architected and realized to simulate the STDP and BCPNN online learning rules, using memristors and 180 nm analog CMOS technology. The results show that the proposed learning engine can achieve energy consumption of 10.61 pJ and 51.49 pJ per synaptic update for the STDP and BCPNN learning rules, respectively, with a 147.03× and 93.61× reduction compared to the 180 nm ASIC counterparts, and also a 9.39× and 5.63× reduction compared to the 40 nm ASIC counterparts. Compared with the state-of-the-art work of Loihi and eBrainII, the learning engine can reduce the energy per synaptic update by 11.31× and 13.13× for trace-based STDP and BCPNN learning rules, respectively.
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