NMOS逻辑
和或反转
通流晶体管逻辑
计算机科学
电子线路
比较器
逻辑门
逻辑优化
逻辑综合
二极管-晶体管逻辑
CMOS芯片
数字电子学
组合逻辑
电子工程
逻辑族
时序逻辑
晶体管
算法
电气工程
工程类
电压
作者
Gongzhi Liu,Shuhang Shen,Peipei Jin,Guangyi Wang,Yan Liang
标识
DOI:10.1007/s00034-021-01770-1
摘要
This paper proposes three modified memristor ratioed logic (MRL) gates: NOT, NOR and A AND (NOR B) (i.e., $$A \cdot \bar{B}$$
), each of which only needs 1 memristor and 1 NMOS. Based on the modified MRL gates, we design some combinational logic circuits, including 1-bit comparator, 3-bit binary encoder, 3-bit binary decoder and 4:1 multiplexer. Furthermore, an improved multifunctional logic module is proposed, which contains one NMOS transistor and five memristors, and can implement AND, OR and XOR logic operations. Using this multifunctional logic module, a 4-bit comparator and a 1-bit full adder are designed. Finally, the proposed combinational logic circuits are verified by LTSPICE simulations. Compared with other memristor-based logic circuits and the traditional CMOS technology, the proposed logic circuits have made great progress in reducing delay, power consumption and the number of transistors.
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