电容器
电气工程
时钟发生器
发电机(电路理论)
计算机科学
拓扑(电路)
功率(物理)
电压
电子工程
电子线路
物理
工程类
量子力学
时钟信号
作者
Samriddhi Agarwal,Shameer Basha Yerragudi,Naveen Dasari,Inhee Lee,Zia Abbas
标识
DOI:10.1109/iscas46773.2023.10181473
摘要
This paper proposes a switched-capacitor network (SCN) based fractional bandgap voltage reference (BGR) circuit designed in 180nm CMOS process to achieve high accuracy and low power consumption for implantable biomedical applications. The design proposes a $V_{EB}$ generator that employs a 2x charge pump and an improved SCN to generate a temperature inde-pendent reference voltage $(V_{REF})$ ’. A low-power clock generator circuit is proposed, which reduces the leakage current by 37 % compared to previous works, thereby reducing the circuit's power consumption to 18.5nW at typical conditions. The design works from a supply voltage of 0.5V and has a TC of 74. Sppm/ ${}^{\circ} \mathrm{C}$ over a temperature range of $0-80^{\circ} \mathrm{C}$ . The PSRR of the circuit is -62.9dB at 100Hz. Based on the Monte Carlo simulations of 500 samples, we obtain an untrimmed $3\sigma/\mu$ of 2.6%. The design occupies an active area of 0.027mm 2 .
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