计算机科学
晶体管
与非门
XNOR门
晶体管计数
电子线路
计算机硬件
逻辑门
冯·诺依曼建筑
电子工程
嵌入式系统
电气工程
电压
工程类
算法
操作系统
作者
Zijing Zhao,Junzhe Kang,Ashwin Tunga,Hojoon Ryu,Ankit Shukla,Shaloo Rakheja,Wenjuan Zhu
出处
期刊:Cornell University - arXiv
日期:2023-01-01
标识
DOI:10.48550/arxiv.2307.03660
摘要
As a promising alternative to the Von Neumann architecture, in-memory computing holds the promise of delivering high computing capacity while consuming low power. Content addressable memory (CAM) can implement pattern matching and distance measurement in memory with massive parallelism, making them highly desirable for data-intensive applications. In this paper, we propose and demonstrate a novel 1-transistor-per-bit CAM based on the ferroelectric reconfigurable transistor. By exploiting the switchable polarity of the ferroelectric reconfigurable transistor, XOR/XNOR-like matching operation in CAM can be realized in a single transistor. By eliminating the need for the complementary circuit, these non-volatile CAMs based on reconfigurable transistors can offer a significant improvement in area and energy efficiency compared to conventional CAMs. NAND- and NOR-arrays of CAMs are also demonstrated, which enable multi-bit matching in a single reading operation. In addition, the NOR array of CAM cells effectively measures the Hamming distance between the input query and stored entries. Furthermore, utilizing the switchable polarity of these ferroelectric Schottky barrier transistors, we demonstrate reconfigurable logic gates with NAND/NOR dual functions, whose input-output mapping can be transformed in real-time without changing the layout. These reconfigurable circuits will serve as important building blocks for high-density data-stream processors and reconfigurable Application-Specific Integrated Circuits (r-ASICs). The CAMs and transformable logic gates based on ferroelectric reconfigurable transistors will have broad applications in data-intensive applications from image processing to machine learning and artificial intelligence.
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