锁相环
抖动
示意图
移植
软件可移植性
发电机(电路理论)
计算机科学
电子工程
过程(计算)
参数化复杂度
嵌入式系统
功率(物理)
工程类
软件
操作系统
量子力学
物理
算法
作者
Zhongkai Wang,Minsoo Choi,Eric Chang,John Wright,Wooham Bae,Sijun Du,Zhaokai Liu,Nathan Narevsky,Colin Schmidt,Ayan Biwas,Borivoje Nikolić,Elad Alon
标识
DOI:10.1109/dac18074.2021.9586318
摘要
We present a bang-bang phase-locked loop (PLL) generator that encapsulates design methodologies for its circuit blocks and the complete PLL system. The generator is fully automated and parameterized, producing the layout and schematic based on process characterization and top-level specifications. Three 14GHz PLLs are instantiated in TSMC 16nm, GF 14nm and Intel 22nm technologies, demonstrating the process portability. The rapid generation time of less than four days enables fast PLL design and technology porting. The PLL design fabricated in TSMC 16nm shows RMS jitter of 565.4fs and power of 6.64mW from a 0.9V supply.
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