跨导
MOSFET
排水诱导屏障降低
光电子学
晶体管
材料科学
电气工程
电容
寄生电容
阈下斜率
截止频率
与非门
逻辑门
栅氧化层
工程类
化学
电压
电极
物理化学
作者
Shekhar Yadav,Chandra Mohan Singh Negi
摘要
Abstract In this work, vertically trenched double gate architecture has been investigated, in which the gates are implemented inside vertical oxide trenches. Besides, a silicon‐germanium channel dual‐gate MOSFET with unconventional L‐shaped drain architecture is proposed to improve device performance further. We have shown that the proposed device is the first‐of‐its‐kind device architecture that controls short channel effects and markedly improves transistor performance. Here, The Atlas 2D device simulator has been used to analyze the performance of the devices. At nanoscaled device dimensions, the proposed L‐shaped DG MOS device demonstrated superior ON current characteristics, higher values of transconductance, larger unity gain cut off frequencies, greater I on to I off ratios, higher gain, lower parasitic capacitance, greater transconductance to drain conductance ratio, suppressed drain induced barrier lowering (DIBL), and lower subthreshold swing (S.S.), in comparison to the recently presented Double Gate MOS with unconventional side drain architecture. All these intriguing features demonstrated by the proposed transistor structure make it a potential candidate for low‐power, high‐frequency applications.
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