失效模式及影响分析
节点(物理)
计算机科学
故障检测与隔离
串行解串
电子工程
缩放比例
泄漏(经济)
材料科学
可靠性工程
嵌入式系统
工程类
计算机硬件
结构工程
人工智能
宏观经济学
几何学
经济
执行机构
数学
作者
Keqing Ouyang,Xixiong Wei,Xinyi Lin,Dan Yang,Na Mei,Tuobei Sun
标识
DOI:10.1109/icept56209.2022.9873274
摘要
As the device characteristic size become tiny, the failure mode shall be more complex and challenging. Traditional isolation techniques such as photon emission microscope (PEM) and optical beam induced resistance change (OBIRCH) are not effective to localize the explicit defect in tremendous complexity cases. Therefore, the advanced dynamic EFA techniques are definitely required. In this study, a novel and effective dynamic analysis technique (DAT) was proposed, which combines PEM and evaluation board to determine the failure location specifically. In 5nm logic device, this method has been successfully applied to diagnose the failure location and identify functional failure mode of SerDes module leakage during testing at low temperature. Eventually, the results showed that DAT could localize the failure site immediately and accurately. Recently, the manufacturing of silicon node had been scaling down dramatically, we would keep on DAT development for the next generation semiconductor devices.
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