带隙基准
CMOS芯片
电气工程
电子线路
晶体管
电压
电子工程
运算放大器
放大器
计算机科学
电压基准
工程类
跌落电压
出处
期刊:IEEE Journal of Solid-state Circuits
[Institute of Electrical and Electronics Engineers]
日期:2002-10-01
卷期号:37 (10): 1339-1343
被引量:119
标识
DOI:10.1109/jssc.2002.803055
摘要
The design of bandgap-based voltage references in digital CMOS raises several design difficulties, as the supply voltage is lower than the silicon bandgap in electron volts, i.e., 1.2 V. A current-mode architecture is used in order to address the main issues posed by the low supply, but the implementation of the operational amplifier and of dedicated startup circuits deserves some attention. Even if nonstandard devices such as depletion-mode MOS transistors may be helpful to manage the supply scaling, they are seldom available and poorly characterized. Therefore, they must be avoided in a robust design featuring a high portability. This paper proposes some circuit solutions suitable for very low-supply-voltage operation and addresses the main issues of achieving the correct bias point at the power on. A few bandgap references were implemented in digital 0.35- and 0.18-/spl mu/m technologies featuring a nominal output voltage of about 500 mV and minimum supplies from 1.5 to 0.9 V.
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