High-κ dielectric van der Waals integration on 2D semiconductors for three-dimensional complementary logic systems

The integration of high-κ dielectrics with two-dimensional (2D) semiconductors has long been limited by the low reactivity of their dangling-bond-free surfaces and the scalability issues of conventional deposition techniques. Here, we report a universal van der Waals (vdW) integration strategy using HfSe₂ as a high-κ precursor that is dry-transferred onto MoS₂ and WSe₂ and fully converted into amorphous HfO₂ via plasma oxidation, while preserving atomically flat vdW interfaces. The resulting HfO₂/MoS₂ and HfO₂/WSe₂ gate stacks exhibit suppressed interface trap densities (D_it ≈ 7-8 × 10¹⁰ cm^-2 eV^-1) and high dielectric constants (κ ≈ 23). MoS₂ n-type field-effect transistors (nFETs) and WSe₂ p-type field-effect transistors (pFETs) fabricated with this approach achieve nearly ideal subthreshold swing ( ≈ 60 mV/dec) and negligible hysteresis ( ≈ 3 mV). This scalable methodology enables the vertical integration of complementary logic, demonstrated by complementary FET inverters and ring oscillators, establishing a promising route toward three-dimensional, energy-efficient logic technologies.