Bias-polarity-dependent resistance switching in W/SiO2/Pt and W/SiO2/Si/Pt structures

Abstract SiO 2 is the most significantly used insulator layer in semiconductor devices. Its functionality was recently extended to resistance switching random access memory, where the defective SiO 2 played an active role as the resistance switching (RS) layer. In this report, the bias-polarity-dependent RS behaviours in the top electrode W-sputtered SiO 2 -bottom electrode Pt (W/SiO 2 /Pt) structure were examined based on the current-voltage (I-V) sweep. When the memory cell was electroformed with a negative bias applied to the W electrode, the memory cell showed a typical electronic switching mechanism with a resistance ratio of ~100 and high reliability. For electroforming with opposite bias polarity, typical ionic-defect-mediated (conducting filament) RS was observed with lower reliability. Such distinctive RS mechanisms depending on the electroforming-bias polarity could be further confirmed using the light illumination study. Devices with similar electrode structures with a thin intervening Si layer between the SiO 2 and Pt electrode, to improve the RS film morphology (root-mean-squared roughness of ~1.7 nm), were also fabricated. Their RS performances were almost identical to that of the single-layer SiO 2 sample with very high roughness (root-mean-squared roughness of ~10 nm), suggesting that the reported RS behaviours were inherent to the material property.