Lv5
860 积分 2023-10-12 加入
Innovative DRAM Cell Featuring a Vertical Junctionless Pillar Access Transistor With a High Work-Function Molybdenum Nitride Metal Gate for Enhanced Performance and Efficiency
2小时前
待确认
Low sheet resistance buried metal bit line realized by high-temperature metal CVD process in vertical channel transistor array
2小时前
已完结
High-Performance Gate-all-around Junctionless Vertical-Channel Transistors with the Ultra-low Sub-threshold Swing for Next-generation 4F2 DRAM
2小时前
已完结
Low sheet resistance buried metal bit line realized by high-temperature metal CVD process in vertical channel transistor array
3天前
已完结
Vertical Channel Transistor (VCT) as Access Transistor for Future 4F2 DRAM Architecture
3天前
已完结
Uniform TiN-Capped Co Buried Bit Lines for 4F 2 DRAM Vertical Channel Transistors: Mitigating Agglomeration with Co Nitridation
4天前
已完结
Improvement of IGZO BTI for DRAM Cell application by heat treatment and recovery effect
16天前
已完结
Bit Line Hammering in Si-Based VCT DRAM: A New Security Challenge and Its Mitigation
16天前
已完结
Oxide-Semiconductor Channel Transistor DRAM (OCTRAM) with 4F2 Architecture
16天前
已完结
Challenges and Opportunities of Oxide-semiconductor Channel Transistor DRAM (OCTRAM)
16天前
已完结
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