Lv5
1230 积分 2024-09-20 加入
23.4 A 6.4Tb/s 4.2pJ/b Co-Packaged Optics ASIC with Direct-Drive Integrated TIA and Retimed Segmented Mach-Zehnder Modulator Driver in 7nm FinFET
5天前
已完结
8.2 A 32Gb/s 12.35Tb/s/mm 2 0.36pJ/b UCIe-Like Die-to-Die Interface Featuring Edge-Triggered Transceivers in 3nm with Active LSI Packaging
13天前
已完结
TSiCV Based Silicon Carbide Interposer Technology
5个月前
已完结
Optimized TIM1 Solution for Large 2.5D HPC Packages Using Silicone Matrix Containing Liquid Metal Materials
6个月前
已完结
An Energy-efficient Si-integrated Micro-cooler for High Power and Power-density Computing Applications
7个月前
已完结
X64 UCIe Chiplet Interconnection at 32 GT/s on a Silicon Core Substrate
7个月前
已完结
Effective Build-Up Substrate Design for Warpage Reduction and Reliability Enhancement in Advanced Semiconductor Packages
7个月前
已完结
High-Speed Packages for the Chiplet Era
8个月前
已完结
Enabling 20 Tb/s/mm Die-to-Die Bandwidth Density with Advanced Packaging Technologies
8个月前
已完结
6.4Tbps, 224Gbps/Lane Co-Packaged Optical Engines With Fine Pitch Through-Package Interconnects: Powering AI/ML and Next-Gen Data Centers
8个月前
已完结
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