Lv4
590 积分 2026-06-08 加入
IEEE Standard for Ethernet - Amendment 3: Media Access Control Parameters for 50 Gb/s and Physical Layers and Management Parameters for 50 Gb/s, 100 Gb/s, and 200 Gb/s Operation
2个月前
已完结
A 9b-Linear 14GHz Integrating-Mode Phase Interpolator in 5nm FinFET Process
2个月前
已完结
A Very High Linearity Twin Phase Interpolator With a Low-Noise and Wideband Delta Quadrature DLL for High-Speed Data Link Clocking
2个月前
已完结
A 0.297-pJ/Bit 50.4-Gb/s/Wire Inverter-Based Short-Reach Simultaneous Bi-Directional Transceiver for Die-to-Die Interface in 5-nm CMOS
2个月前
已完结
Multi-Phase Clock Generation for Phase Interpolation With a Multi-Phase, Injection-Locked Ring Oscillator and a Quadrature DLL
2个月前
已完结
A 112-Gb/s —8.2-dBm Sensitivity 4-PAM Linear TIA in 16-nm CMOS With Co-Packaged Photodiodes
3个月前
已完结
Analysis and Design of Transimpedance Amplifiers for Optical Receivers
3个月前
已完结
A 56-Gb/s 10.46-$\text{pA}{/}$ ${\!}\sqrt{\text{Hz}}$ Input Noise Linear TIA With 31-dB Dynamic Range in 22-nm CMOS
3个月前
已关闭
A 56-Gb/s 10.46-$\text{pA}{/}$ ${\!}\sqrt{\text{Hz}}$ Input Noise Linear TIA With 31-dB Dynamic Range in 22-nm CMOS
3个月前
已完结
A 1-GS/s 11-b Time-Interleaved SAR ADC With Robust, Fast, and Accurate Autocorrelation-Based Background Timing-Skew Calibration
3个月前
已完结