Lv11
60 积分 2026-02-12 加入
A Fractional-N Sampling PLL With a Merged Constant-Slope DTC and Sampling PD
1小时前
已完结
Low-Jitter PLL Design for Advanced Wireless CMOS Transceivers
26天前
已完结
A 14-nm Ultra-Low Jitter Fractional-N PLL Using a DTC Range Reduction Technique and a Reconfigurable Dual-Core VCO
26天前
已完结
A 28-nm 75-fsrms Analog Fractional-$N$ Sampling PLL With a Highly Linear DTC Incorporating Background DTC Gain Calibration and Reference Clock Duty Cycle Correction
26天前
已完结
A High-Output-Swing and Low-Current-Mismatch Charge Pump for PLL
4个月前
已完结
A current-configurable charge pump with current mismatch compensation for wide output frequency range phase-locked loop
6个月前
已完结
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