| 标题 |
A routability and performance driven technology mapping algorithm for LUT based FPGA designs |
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| DOI | |
| 其它 |
期刊:ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349) 作者: Chi-Chou Kao; Yen-Tai Lai 出版日期:2003-01-20 |
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(2025-6-4)