| 标题 |
Novel Error-Tolerant Voltage-Divider-Based Through-Silicon-Via Test Architecture |
| 网址 | |
| DOI |
10.1109/tcad.2022.3172058
doi
|
| 其它 |
期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 作者:Youngkwang Lee; Donghyun Han; Sooryeong Lee; Sungho Kang 出版日期:2022-05-02 |
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