Performance Evaluation of High-κ Dielectric Ferro-Spacer Engineered Si/SiGe Hetero-Junction Line TFETs: A TCAD Approach

In this work, we have investigated the impact of ferroelectricity of high- $\kappa $ spacers on the electrical performance of line-tunnel field-effect transistors (L-TFETs) by numerical simulation using technology computer-aided design (TCAD). We observed that the ferroelectric (FE) spacer increases the fringing electric field near the tunneling cross Section at the source–epitaxial layer junction. This, in turn, increases the band-to-band tunneling (BTBT) generation and hence the drive capability of the device. Almost $2\times $ improvement in the drive capability of L-TFET is observed when the saturation ( $\left(P_s\right)$ ) and remanent polarization ( $\left(P_r\right)$ ) of spacer material are kept at 60 and $3 \mu \text{C}$ /cm $^{\textbf {2}}$ , respectively, without any significant change in the OFF current. A change of $\sim $ 100 mV in the tunneling onset voltage is also observed when $\left(P_r\right)$ is increased from 1 to $3 \mu \text{C}$ /cm $^{\textbf {2}}$ . A higher value of $\left(P_r\right)$ results in increasing $I_{{\textbf {OFF}}}$ due to the onset of BTBT at zero gate bias. A $\sim 10^{{\textbf {3}}} \times $ increase in $I_{{\textbf {OFF}}}$ is noted when $\left(P_r\right)$ is increased beyond $3 \mu \text{C}$ /cm $^{\textbf {2}}$ . A change of 40 mV in the saturation voltage was also noted when $\left(P_s\right)$ is increased from 10 to $60 \mu \text{C}$ /cm $^{\textbf {2}}$ . We have also observed a significant change in the device's transconductance ( $\left(g_m\right)$ ) and output resistance ( $\left(r_o\right)$ ) with the variation in ferroelectricity of the spacer material. The gate capacitances also change with $\left(P_s\right)$ and $\left(P_r\right)$ and hence the bandwidth.