Contact-doping co-engineering for vertical van der Waals complementary field-effect transistors

Complementary field-effect transistors (CFETs) based on van der Waals heterostructures are a promising platform for extending Moore's law beyond silicon technology. However, this potential is hindered by the challenge of obtaining balanced complementary transport due to the lack of reliable p-type channels and tuning methods. Here, we introduce a contact-doping co-engineering strategy to overcome this challenge. By combining oxygen plasma-induced surface doping with a bottom-contacted configuration, we achieve uniform p-type doping in WSe2 while simultaneously suppressing contact barriers for efficient hole injection. This approach yields optimized p-type transistors with performance well-balanced to the n-type MoS2 device. Subsequently, we demonstrate a vertically integrated MoS2–WSe2 CFET, which is effectively controlled by a shared graphene gate with thin h-BN dielectrics at operating voltages below 5 V. Furthermore, a vertical inverter is implemented within the CFET using an interconnect via contact, which exhibits clear logic inversion and a high voltage gain of ∼30. Our work provides a practical pathway for achieving balanced complementary logic and highlights the significance of van der Waals heterostructures for compact, high-performance, and low-voltage logic circuits.