The study of embedded microfluidic cooling for chip thermal management at KW/cm2 level

With the rapid development of the artificial intelligence (AI) chips toward higher integration and power densities, a great challenge for chip thermal management has been presented. Particularly, for chips operating under high power densities, effectively reducing their junction temperature represents a critical issue. To address this critical challenge, this study employs the embedded manifold microfluidic cooling method, incorporating an optimized manifold structure specifically designed to improve coolant distribution, thereby maintaining the junction temperature below 92.1°C for AI chips operating at power densities of 1.5kW/cm² level. Experimental results demonstrate that for the 6 mm × 6 mm Thermal Test chip (TTC) incorporation of the optimized manifold structure enables a power of 550W (1527.8 W/cm2) at a flow rate of 800mL/min, with the chip junction temperature rise below 65.1 °C. Meanwhile, the TTC achieves a minimum total thermal resistance of 0.116 K/W, demonstrating the potential of the optimized manifold and the ability of this method for high-performance thermal management in high power density applications.