Suppression of current collapse by hole injection from drain in a normally-off GaN-based hybrid-drain-embedded gate injection transistor

Current collapse is suppressed up to 800 V of drain voltage in our proposed device, Hybrid-Drain-embedded Gate Injection Transistor (HD-GIT), where an additional p-GaN layer is grown on the AlGaN barrier layer and is connected to the drain electrode. We present, based on a device simulation and electroluminescence study, that the hole injection from the additional drain-side p-GaN at the OFF state compensates the hole emission in the epilayer. As a result, the gate-drain access region is not negatively charged at the OFF state, resulting in the drastic suppression of current collapse in HD-GIT.