像素
探测器
炸薯条
CMOS芯片
物理
点间距
电容感应
光电子学
信号(编程语言)
图像传感器
专用集成电路
光学
电气工程
计算机硬件
计算机科学
工程类
程序设计语言
作者
H. Zhang,F. Ehrler,R. Schimassek,I. Perić
标识
DOI:10.1088/1748-0221/15/09/p09041
摘要
A sensor chip for a capacitively coupled pixel detector (CCPD53) has been designed and produced in a 180 nm high voltage CMOS (HVCMOS) technology on a high resistivity wafer with deep p-well option. Capacitively coupled pixel detectors are a simple and low-cost alternative to classical hybrid detectors. They rely on capacitive signal transmission between the sensor chip and the readout chip. A pixel detector with small pixel size can be made without small pitch bumps. The CCPD53 sensor chip contains a pixel matrix of 64 × 40 pixels, each 25 μm × 50 μm in size. The digital output signals of a group of 16 pixels are encoded and the 8-bit output is connected to signal transmission pads arranged with pitch of 50 μm. The pad geometry has been chosen in a way to fit the geometry of the pixel readout ASIC developed by RD53 collaboration at CERN. The PHOTON readout chip has been implemented in the UMC 180 nm CMOS technology. It allows counting and integration of charge signals. The chip consists of a matrix of 32 × 30 identical square pixels with 150 μm × 150 μm size. In this paper the sensor and the readout chip will be described and the measurement results presented.
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