Optimizing data placement and size configuration for morphable NVM based SPM in embedded multicore systems

Embedded multicore systems are widely designed to meet the high-performance requirement. Meanwhile, many embedded multicore systems are equipped with multiple scratchpad memories (SPM) because of their advantages in power efficiency and small area. Whereas, the traditional SRAM-based SPM is limited by its leakage power and capacity. Compared with SRAM, emerging non-volatile memory (NVM) has lower power consumption. Moreover, some morphable NVMs like resistive memory can build a "morphable NVM" to get a balance between capacity and performance, in which a memory cell can be converted between high-density MLC (multi-level cell) and low-latency SLC (single-level cell). Considering the features of NVM, this paper proposes a dynamic data placement and size configuration technique to fully utilize the benefits from morphable NVM based SPM in embedded multicore systems. The core idea is to dynamically convert the memory mode of NVM in each SPM with different workloads, and store the associated data into an optimal storage location for minimizing the total cost of memory access. Therefore, combining with the access pattern of embedded systems, an Integer Linear Programming (ILP) model is first explored for obtaining the optimal data placement and size configuration of SLC/MLC of SPMs. Then, our polynomial-time algorithm (CDA) is provided to obtain a near-optimal result. Finally, our experiments based on the gem5 simulator exhibit the proposed techniques can achieve the performance improvement and the reduction of energy consumption compared with the baseline scheme.