SnO2 Buffer Layers for High Efficiency CdSeTe/CdTe Devices

SnO2 buffer layers of different thickness were deposited onto TEC 15 Fluorine doped tin oxide coated glass substrates using rf magnetron sputtering. The buffer layers were then incorporated into Cu-doped CdSeTe/CdTe devices using a range of CdCl 2 activation treatments and CuCl2 annealing temperatures to determine the effects of buffer layer thickness on device performance. Results show that all devices fabricated with thinner buffer layers resulted in much better J ― V characteristics than their thicker counterparts. This was mainly due to a reduced open-circuit voltage $(\mathrm{V}_{\text{oc}})$ when using thicker buffer layers. The best device produced a conversion efficiency of 16.59%, fill factor of 71.62%, Jsc of 28.44 mA/cm ² and $\mathrm{V}_{\text{oc}}$ of 814.23 mV.