Heuristics-Enabled High-Performance Application Mapping in Network-on-Chip based Multicore Systems

The allocation of resources and scheduling of tasks, specifically mapping, in multicore systems on-chip (MCSoC), pose significant challenges. Tasks have diverse resource requirements and interact with each other, while multicore systems consists of heterogeneous cores and communication networks. The heterogeneity of resources in MCSoC, along with the varying computational and communication demands of applications, makes mapping a complex optimization problem. We have mathematically modeled the mapping problem in multicore systems using linear programming. This model incorporates computation and communication capacity and power budget constraints of MCSoC, and execution time requirements of applications. To tackle this optimization problem, we have proposed simulated annealing and genetic algorithms that take into consideration the capacity and budget constraints for mapping applications onto NoC-based MCSoC systems. Simulation results demonstrate that the simulated annealing algorithm outperforms the genetic algorithm across various applications under the E3S benchmarks for 2D-mesh NoCs with 36 to 100 cores.