Vertical Oxide Channel Thin Film Transistor for Ultra-High-Resolution Display

The significance of backplane devices for ultra-high-resolution (UHR) display has increased with the recent development of augmented reality (AR) and virtual reality (VR) devices. Since the human visual resolution can distinguish up to 60 pixels per degree (PPD), the AR/VR device panel needs at least 3000 pixels per inch (PPI) to exceed the human retina resolution limit for clear display without screen effect. As a results, the unit pixel pitch of thin film transistor (TFT) for UHR display should be not only smaller than a few micrometers (~3 μm), TFT channel length should also be sub-micrometers level. In active matrix organic light emitting diode (AMOLED) display type, self-aligned top gate (SATG) TFT has been widely used as a planar backplane device structure because of its low parasitic capacitance and tolerance of illumination degradation caused by the light from emitting layer [1-2]. However, SATG TFT has fundamental disadvantages for device miniaturization due to its essentially required area of metallization region for reducing contact resistance and scaling limit of channel induced by carrier diffusion shrinking effective channel length. For this reason, we suggested a size tunable oxide channel VTFT structure that can achieve a high pixel density on account of structural benefit on device footprint. In this work, we fabricated amorphous indium gallium zinc oxide (a-IGZO) based VTFT. The previously published VTFT structure, channel length is determined by the thickness of spacer between source and drain electrodes [3]. Owing to spacer etching process, uneven backchannel roughness and high off current has become well-known issues of VTFT. On the contrary, the proposed VTFT structure has a controllability of effective channel aspect ratio because source and drain electrodes are able to be patterned by photolithography process. Furthermore, the parasitic capacitance is also relatively less than the formerly reported VTFTs controlled by inevitable thickness limit structurally due to the electrodes. To sum up, we not only realized the oxide channel VTFT that meets high performance for AR/VR display, but opened new application possibility to UHR electronic devices platform. Figure 1. (a) Schematic of the proposed VTFT (b) Transfer characteristic of VTFT Acknowledgement This work was supported by the Korea Evaluation Institute of Industrial Technology(KEIT) grant funded by the Korea government (MOTIE) (No. 2021-11-1283) References Kang, Dong Han, et al. "Self-aligned coplanar a-IGZO TFTs and application to high-speed circuits." IEEE electron device letters 32.10 (2011): 1385-1387. Wang, Guoying, et al. "8.3: High Stability Against Light and Heat Based on the Top Gate Self‐Aligned a‐IGZO TFTs under OLED Dislplay." SID Symposium Digest of Technical Papers . Vol. 49. 2018. Petti, Luisa, et al. "Flexible quasi-vertical In-Ga-Zn-O thin-film transistor with 300-nm channel length." IEEE Electron Device Letters 36.5 (2015): 475-477. Figure 1