印刷电路板
计算机科学
材料科学
工程类
电气工程
作者
Chiyao Mo,Zhihui Hu,Ji Wang,Xiaolong Xiao
标识
DOI:10.1109/tim.2025.3563011
摘要
Ensuring the quality of the Printed Circuit Board (PCB) is vital. Most of the current fault detection algorithms perform well in PCB defect detection. However, these methods involve too many parameters or computations, which makes them unfriendly to devices with limited computational capability and small memory capacity. Additionally, problems such as missed or false detection may occur due to the complex background environment and small defect size. Thus, this article proposes an improved model based on YOLOv5s named SGT-YOLO to strike a better trade-off between accuracy and model complexity. Firstly, an SE-ENv2 backbone derived from EfficientNetv2(ENv2) is proposed, which retains more detail and position information about tiny defects and emphasizes the critical features while maintaining a small model size. Secondly, the P4 and P5 detection heads were removed from YOLOv5s to decrease the model’s parameters, allowing the model to focus more on small PCB defects. Moreover, the TSCODE (Task Specific Context Decoupling) head is introduced to extract the location and category information about defects separately, strengthening the model’s learning ability. Finally, a GC-Neck consisting of GSConv and C3-GC is proposed, which enhances the model’s capability to extract tiny defect features while reducing parameters. The experimental results show that SGT-YOLO reduced the baseline parameters and floating-point operations by 79% and 35%, respectively. Furthermore, SGT-YOLO improves the mAP and mAP0.5 by 2.7% and 6.4% on HRIPCB datasets, indicating its lightweight and accuracy in PCB defect detection.
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