探测器
相关双抽样
CMOS芯片
寄生电容
晶体管
噪音(视频)
线性
电容
电气工程
物理
采样(信号处理)
光电效应
电压
电子工程
光电子学
计算机科学
工程类
人工智能
电极
放大器
图像(数学)
量子力学
作者
Honghui Yuan,Yongping Chen
出处
期刊:AIP Advances
[American Institute of Physics]
日期:2020-10-01
卷期号:10 (10)
被引量:1
摘要
A high-performance readout circuit for photoelectric detectors is developed in this paper to achieve high-speed low-noise image detection. Here, the W/L ratio of the first-stage P-type following transistor is reduced to decrease the parasitic capacitance of buses, and the bias voltage of the P-type following load transistor is minimized to increase the driving current. These changes increase the sampling frequency of the read-out circuit from its original 2 MHz to 6 MHz, thereby effectively improving the readout frequency of the long-line visible light CMOS detector. Four-sampling is used to achieve true correlated double-sampling and reduce the equivalent input noise of the device, thus, overcoming the original circuit’s non-true correlation cancellation. Testing revealed that the number of equivalent input noise electrons of the CMOS detector decreased from 100e to 50e (rms) when the integral time is 200 µs and the photosensitive area is 20 × 18 μm2. The device could work steadily at a sampling rate of 6 MHz, and its linearity and output swing exceed 99% and 2 V, respectively. Moreover, the sensitivity of the detector could meet the requirements of the system. The development of the proposed CMOS detector lays an important theoretical foundation and provides practical value for future research on ultra-high speed and high-definition image detection technologies.
科研通智能强力驱动
Strongly Powered by AbleSci AI