作者
S. W. Chang,Ta-Ping Lu,Chenyi Yang,Chia-Nan Yeh,Min-Wei Huang,Ching-Fan Meng,P.-J. Chen,Tin-Chun Chang,Yuo-Sheng Chang,Jhe-Wei Jhu,Hong Tong,Chi-Ting Ke,Xueyang Yu,Wen-Hsiang Lu,M. A. Baig,T.-C. Cho,Po-Jung Sung,Chun Jung Su,Fu-Kuo Hsueh,B.-Y. Chen,Hsuan-Lun Hu,Chien-Ting Wu,Kuei-Huei Lin,W. C.-Y.,Darsen D. Lu,Kuo-Hsing Kao,Y.-J. Lee,C.-L. Lin,Kun-Ping Huang,K.-M. Chen,Y. Li,Seiji Samukawa,Tien Sheng Chao,Guo Wei Huang,Wen−Fa Wu,Wen-Hsuan Lee,J.-Y. Li,Jia Min Shieh,J.-H. Tarng,Y.-H. Wang,Wen–Kuan Yeh
摘要
In this work, we demonstrate vertically stacked heterogeneous dual-workfunction gate complementary FET (CFET) inverters and 6T-SRAM with n-type IGZO and p-type polysilicon channels for the first time. The dual-workfunction gate structure with adjusted gate biasing allows the adjustment of channel potential to match the threshold voltage of transistors for CMOS and SRAM operation. High-frequency IGZO RF devices with p-type silicon isolation are fabricated simultaneously with the same process. Novel etching process based on fluorine-based gas with an extremely high-etching selectivity between the source/drain metal and the IGZO facilitates the definition of the source/drain region. IGZO surface treated with fluorine-based gas during over-etching step allows a low leakage current shallow passivation layer to optimize direct current characteristics.