(Invited) Area Selective ALD: Looking Back and Looking Forward

The continued downscaling of electronic device dimensions requires the development of new, precise patterning methods that are compatible with high-volume manufacturing. Area selective atomic layer deposition (AS-ALD) continues to gain attention as an important method to achieve nanoscale features at the sub-10 nm length scale. It is known that tuning the surface chemistry of the substrate can be used to either inhibit or enhance ALD nucleation, leading to selective deposition. Since the initial introduction of AS-ALD 20 years ago, a key strategy has been the use of inhibitors, ranging from long-chain self-assembled monolayers to small molecule inhibitors, which can alter the native surface reactivity to block nucleation. This inhibition approach enables good selectivity in AS-ALD of thin films on a variety of substrate materials, including dielectrics and metals, and is in use today. I will present several inhibitor-based AS-ALD systems. As the field moves forward, however, additional process parameters will need to be tuned if we are to meet future AS-ALD application requirements, which are now dictating a wide breadth of materials systems (including dielectric/dielectric, metal/dielectric, carbon/dielectric, multicolor patterns, etc.) as well as a high degree of selectivity. I will introduce some of the approaches under development, including tuning the ALD precursor in concert with the inhibitor. Results show that precursor size can have a significant influence on the ability of inhibitors to prevent ALD nucleation; for example, larger precursors can provide for selectivity even when less inhibitory blocking molecules are used. However, precursor size alone is not the defining metric, and I will share examples that highlight the influence of other precursor effects, such as precursor-inhibitor reactivity and miscibility. Ultimately, developing molecular design rules for both inhibitors and ALD precursors will be critical for applying AS-ALD more widely to future challenges in microelectronics fabrication.