互连
模具(集成电路)
材料科学
绝缘栅双极晶体管
数码产品
电源模块
基质(水族馆)
炸薯条
工程物理
电气工程
电力电子
消散
电子包装
图层(电子)
功率(物理)
机械工程
计算机科学
工程类
纳米技术
电信
地质学
物理
电压
海洋学
热力学
量子力学
作者
Karsten Guth,N. Oeschler,L. Boewer,R. Speckels,G. Strotmann,Nicolas Heuck,S. Krasel,A. Ciliox
出处
期刊:2012 7th International Conference on Integrated Power Electronics Systems (CIPS)
日期:2012-03-06
卷期号:: 1-5
被引量:46
摘要
Higher operation temperatures and the current density increase of new IGBT generations make it more and more complicated to meet the quality requirements for power electronic modules. Especially the increasing heat dissipation inside the silicon leads to maximum operation temperatures of nearly 200 deg C. As a result new packaging technologies are needed to face the demands of power modules in the future. In case of the chip-to-substrate interconnect basically two technology trends for an improved die attach procedure became visible. On the one hand diffusion bonding has been presented, where the joint is formed from high melting intermetallics. On the other hand the chip-to-substrate interconnect can be realized by sintering silver particles, resulting in a monometallic porous die attach layer. This paper presents a comparison of these two technology trends with respect to their applicability for power electronics packaging.
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