Impact of Intrinsic Parameter Dispersion on Short-Circuit Reliability of Parallel-Connected Planar and Trench SiC MOSFETs

The intrinsic parameter disparities between silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) in the same phase leg can lead to variations in electrothermal stress distributions, potentially impacting the overall reliability in parallel configurations. This effect is particularly pronounced under extreme stress conditions such as short-circuit events. To characterize degradation trends between paralleled SiC MOSFETs, and to investigate the influence of the parameter mismatch inherent to the chips on reliability, repetitive short-circuit stress was applied to parallel-connected planar, symmetrical double-trench, and asymmetrical trench SiC MOSFETs. The paralleled devices were intentionally selected with evident differences in threshold voltages ( V _th ) or on-state resistances ( R _on ) to explore different degradation patterns between the devices. Test results revealed that dynamic current sharing exists during the tests, especially evident in the case of the planar SiC MOSFETs. In addition to the mismatch in parameters, the quality and reliability of gate oxide in symmetrical double-trench devices presented clear differences. As for parallel asymmetrical trench SiC MOSFETs, they exhibited similar reliability between the paralleled devices, but the degradation of V _th in one device has been interdependent on the V _th of the other paralleled device throughout the repetitive testing.