静电放电
通用串口总线
工程类
炸薯条
二极管
电压
接口(物质)
电气工程
电子工程
瞬态电压抑制器
瞬态(计算机编程)
计算机科学
软件
肺表面活性物质
吉布斯等温线
化学工程
程序设计语言
操作系统
作者
Yang Xu,Jianchi Zhou,Sergej Bub,Steffen Holland,Javad Soleiman Meiguni,David Pommerenke,Daryl G. Beetner
出处
期刊:IEEE Transactions on Electromagnetic Compatibility
[Institute of Electrical and Electronics Engineers]
日期:2023-06-01
卷期号:65 (3): 625-633
被引量:3
标识
DOI:10.1109/temc.2022.3232616
摘要
Integrated circuits (ICs) connected to a universal serial bus (USB) interface require robust electrostatic discharge (ESD) protection strategies due to the nature of the high-speed interface and the regular access by users. System-efficient ESD design (SEED) simulations can help predict the level of ESD stress seen by the IC when protected by a transient voltage suppressor (TVS). In the following paper, previously developed models were improved to predict the voltage and current seen by a TVS and an on-chip protection diode when an ESD gun was discharged to one USB cable pin. Models were improved, in part, by accurately modeling the conductivity modulation within the behavioral TVS model and by using a measured equivalent source to represent the complex interaction between the ESD gun, USB cable, and enclosure. The response of the TVS and on-chip diode was studied in simulation and measurement for several cable configurations and when adding passive components between the TVS and on-chip diode. Simulations predicted peak and quasi-static voltages and currents at the TVS and on-chip diode within 30% of those seen in measurements. The proposed modeling process can help engineers to evaluate and optimize the effectiveness of their ESD protection strategies under complicated test conditions.
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